Saankhya Labs bets on interoperable chip for a piece of 5G Open RAN pie

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Saankhya Labs bets on interoperable chip for a piece of 5G Open RAN pie

Saankhya Lab is developing an elastic RAN chip which will be open architecture sidelining the Current Open RAN architecture which still uses COTS (commercially off the shelf) hardware. Therefore, the software developed on top of it is truly interoperable from one chip set maker to another.

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Securing Mission-critical Operations with Emerging Transport Technologies – Somnath Ojha, AVP, CTO’s Office

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“From a customer standpoint, our products have flexibility—and the time-to-market is shorter. They don’t have to wait for a new chip or design a new board/hardware,” says Sanjay Nayak.

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